Additional changes regarding program loading

This commit is contained in:
John Lorentzson 2025-07-15 18:18:15 +02:00
parent f81c0f7e65
commit 17560c4b78
2 changed files with 22 additions and 15 deletions

View file

@ -7,7 +7,7 @@
;; 16-bit byte-length (big endian) | data ;; 16-bit byte-length (big endian) | data
;; ############################################ ;; ############################################
;; The data comes from CTRL2 bit 0 and the clock is at bit 1 ;; The data comes from CTRL1 bit 0 and the clock is at bit 1
;; The stream starts when the clock is pulled high, after that comes a ;; The stream starts when the clock is pulled high, after that comes a
;; 16-bit big endian number that matches the byte-lenght of the data that will get sent. ;; 16-bit big endian number that matches the byte-lenght of the data that will get sent.
@ -23,35 +23,37 @@
progdest = $fe progdest = $fe
CLKMASK = %00000010 CLKMASK = %00000010
CTRL2 = $DC00 CTRL1 = $DC01
.org $80d .org $80d
coldstart: ;; Draw an at sign on screen to show that program has loaded coldstart: ;; Draw an at sign on screen to show that program has loaded
lda #$0 lda #$0
sta $400 sta $400
waitstart: ;; Wait until joystick 1 has been pulled forwards to start the program sta progdest
lda $dc01 lda #$c0
and #$01 sta progdest+1
waitstart: ;; Wait until joystick 2 has been pulled down to start the program
lda $dc00
and #$02
bne waitstart bne waitstart
;; Change border colour for debugging ;; Change border colour for debugging
lda #$00 lda #$03
sta $d020 sta $d020
teststart: teststart:
jsr check_for_load_start ; Check if start_bit is correct jsr check_for_load_start ; Check if start_bit is correct
bcs @error ; Idk why C=1 ask john bcs @error ; The routine sets carry in the event of an error
beq teststart beq teststart
@doneforever:
jmp $c000 ; starts the program? jmp $c000 ; starts the program?
jmp $c000
@error: @error:
lda #1 lda #1
sta $0400 ;lets store 1 att this address for debuging purposes
rts rts
check_for_load_start: check_for_load_start:
lda #CLKMASK lda #CLKMASK
bit CTRL2 bit CTRL1
bne start ; branch if Z ==0 <--> CTRL2 and CLKMASK ==0 <---> CTRL2 bit 2 == 0 bne start
lda #$00 lda #$00
rts rts
start: start:
@ -65,13 +67,13 @@ start:
wait_for_bit_start: wait_for_bit_start:
lda #CLKMASK lda #CLKMASK
@loop: @loop:
bit CTRL2 bit CTRL1
beq @loop beq @loop
lda #CLKMASK lda #CLKMASK
bit CTRL2 bit CTRL1
beq error beq error
lda CTRL2 lda CTRL1
lsr lsr
ror BYTE ror BYTE
@ -117,8 +119,12 @@ new_byte:
wait_for_bit_end: wait_for_bit_end:
lda #CLKMASK lda #CLKMASK
@loop: @loop:
bit CTRL2 bit CTRL1
bne @loop bne @loop
;; Debug show the clock is low
lda #$00
sta $d020
jmp wait_for_bit_start jmp wait_for_bit_start
done: done:

View file

@ -222,6 +222,7 @@
output-filepath)))) output-filepath))))
(defun send-data-to-c64 (data) (defun send-data-to-c64 (data)
(declare (type vector data))
(with-open-file (stream "/dev/ttyACM0" (with-open-file (stream "/dev/ttyACM0"
:direction :io :direction :io
:element-type '(unsigned-byte 8) :element-type '(unsigned-byte 8)