reduse linedraw cpu cyckles before the loop

This commit is contained in:
hugova 2025-07-16 21:31:21 +02:00
parent e23896d9f9
commit b4860b000c
4 changed files with 61 additions and 18 deletions

View file

@ -22,9 +22,8 @@
SEC SEC
LDA dx LDA dx
SBC dy SBC dy
Mult_16 A, V +1
STA V STA V
Mult_16 V, V +1
;dy_2 = dy*2 ;dy_2 = dy*2
Mult_16 dy_2, dy_2 +1 ;>dy_2 = dy (same address) Mult_16 dy_2, dy_2 +1 ;>dy_2 = dy (same address)
@ -39,9 +38,21 @@
;; and to its branch logic later in the loop. ;; and to its branch logic later in the loop.
;;D = 2*dy - dx + 2*255 ;;D = 2*dy - dx + 2*255
Mov_16 D, D + 1, dy_2, dy_2 + 1 LDA dy_2
Add_16 D, D + 1, #$ff, #$01, ! ADC #$ff
Sub_16 D, D + 1, dx, #$00 TAX
LDA dy + 1
ADC #$01
TAY
SEC
TXA
SBC dx
STA D
TYA
SBC #$00
STA D + 1
selfmod: selfmod:
;; Self modifying code. Makes LDA and SBC instructions each take 1 cycle less. ;; Self modifying code. Makes LDA and SBC instructions each take 1 cycle less.
;; You can remove this if you run the loop without # at dy_2 and V. ;; You can remove this if you run the loop without # at dy_2 and V.

View file

@ -19,15 +19,25 @@
SEC SEC
LDA dy LDA dy
SBC dx SBC dx
Mult_16 A, V + 1
STA V STA V
Mult_16 V, V + 1
Mult_16 dx_2, dx_2 + 1 Mult_16 dx_2, dx_2 + 1
Mov_16 D, D + 1, dx_2, dx_2 + 1 LDA dx_2
Add_16 D, D + 1, #$ff, #$01, ! ADC #$ff
Sub_16 D, D + 1, dy, #$00 TAX
LDA dx + 1
ADC #$01
TAY
SEC
TXA
SBC dy
STA D
TYA
SBC #$00
STA D + 1
selfmod: selfmod:
LDA dx_2 LDA dx_2

View file

@ -21,14 +21,25 @@
SEC SEC
LDA dx LDA dx
SBC dy SBC dy
Mult_16 A, V + 1
STA V STA V
Mult_16 V, V + 1
Mult_16 dy_2, dy_2 + 1 Mult_16 dy_2, dy_2 + 1
Mov_16 D, D + 1, dy_2, dy_2 + 1
Add_16 D, D + 1, #$ff, #$01, ! LDA dy_2
Sub_16 D, D + 1, dx, #$00 ADC #$ff
TAX
LDA dy + 1
ADC #$01
TAY
SEC
TXA
SBC dx
STA D
TYA
SBC #$00
STA D + 1
selfmod: selfmod:
LDA dy_2 LDA dy_2

View file

@ -20,14 +20,25 @@
SEC SEC
LDA dy LDA dy
SBC dx SBC dx
Mult_16 A, V + 1
STA V STA V
Mult_16 V, V + 1
Mult_16 dx_2, dx_2 + 1 Mult_16 dx_2, dx_2 + 1
Mov_16 D, D + 1, dx_2, dx_2 + 1 LDA dx_2
Add_16 D, D + 1, #$ff, #$01, ! ADC #$ff
Sub_16 D, D + 1, dy, #$00 TAX
LDA dx + 1
ADC #$01
TAY
SEC
TXA
SBC dy
STA D
TYA
SBC #$00
STA D + 1
selfmod: selfmod:
LDA dx_2 LDA dx_2