Switched CLC ROR to LSR. 2% performance improvment

This commit is contained in:
hugova 2025-03-24 17:45:22 +01:00
parent ed0966c736
commit f583423bb6
2 changed files with 20 additions and 6 deletions

View file

@ -10,7 +10,6 @@
.proc line_down
.include "line.inc"; Defines memory positions, ex X_pos
;;We need to clear this memory
LDA #$00
STA <V
@ -60,8 +59,8 @@ for_x:
ORA (>btp_mem_pos), Y
STA (>btp_mem_pos), Y
increment_pixel_x:
CLC
ROR byte_to_paint
;CLC
LSR byte_to_paint
BCS move_8px_left
JMP increment_pixel_x_end
move_8px_left:

View file

@ -1,6 +1,9 @@
;;; -*- Mode: asm; indent-tabs-mode: t; tab-width: 8 -*-
.include "line.inc"
;;START TIME HERE
;;for testing stuff
Y_pos_ = $0D
X_pos_ = $0E
@ -15,8 +18,7 @@
LDA #$30
STA Y_end
;; Short test for timing
time_start
@loop:;; mem f1
LDA Y_pos_
STA Y_pos
@ -30,7 +32,20 @@
BEQ end__
jmp @loop
end__:
time_stop
;;Lets cleer bitmap
LDA #>VIC_bank
STA $FC
LDA #<VIC_bank
STA $FB
LDA #>$5f3f
STA $FE
LDA #<$5f3f
STA $FD
LDA #$0
jsr memory_rec
jmp exit
.include "line_down.s"