;; 16bit addition macro.
;; b_low may be A and b_hi may be X or Y
;; You may append a ! att the end to skipp the CLC instruction (makes it run 2 cykles faster)
;; It will change the A-register.
;; examples is:
;; Add_16 a, b
;; Add_16, a_low, a_hi, b_low, b_hi
;; Add_16 a_low, a_hi, A, b_hi
;;Se below for some fast 16bit logic
;;http://6502.org/tutorials/compare_beyond.html

;;Helper macro 2x 16bit addresses
.macro __Add_16_2 a_, b_
        .assert .not .match ({a_}, X) ,error, "a_ is not allowed to be X"
        .assert .not .match ({b_}, X) ,error, "b_ is not allowed to be X"
        .assert .not .match ({a_}, Y) ,error, "a_ is not allowed to be y"
        .assert .not .match ({b_}, Y) ,error, "b_ is not allowed to be y"
        .assert .not .match ({a_}, A) ,error, "a_ is not allowed to be A"
        .assert .not .match ({b_}, A) ,error, "b_ is not allowed to be A"
        .assert .not .match (.left (1, {a_}), #) ,error, "b_ is not allowed to start with #"
        .assert .not .match (.left (1, {b_}), #) ,error, "b_ is not allowed to start with #"
        LDA >b_
        ASC >b_
        STA >a_
        LDA <b_
        ADC <b_
        STA <a_
.endmacro

;;Helper macro 4 8bit values
.macro __Add_16_1 a_low, a_hi, b_low, b_hi
        ;;X and Y may only be b_hi
        .assert .not .match ({a_low}, x) ,error, "a_low is not allowed to be X"
        .assert .not .match ({a_low}, Y) ,error, "a_low is not allowed to be Y"
        .assert .not .match ({a_hi}, x)  ,error, "a_hi is not allowed to be X"
        .assert .not .match ({a_hi}, Y)  ,error, "a_hi is not allowed to be Y"
        .assert .not .match ({b_low}, x) ,error, "a_low is not allowed to be X"
        .assert .not .match ({b_low}, Y) ,error, "a_low is not allowed to be Y"
        ;;A may only be b_low
        .assert .not .match ({b_hi}, A) ,error, "b_hi is not allowed to be A"
        .assert .not .match ({a_low}, A) ,error, "a_low is not allowed to be A"
        .assert .not .match ({a_hi}, A) ,error, "a_hi is not allowed to be A"
.if .not .match ({b_low}, a)
	LDA b_low
.endif ;;untested
	ADC a_low
	STA a_low
.if .match ({b_hi}, x) ;;Untested
        TXA
.else
	LDA b_hi
.endif
	ADC a_hi
	STA a_hi
CLC
.endmacro

.macro hihi a_low, a_hi, b_low, b_hi
CLC
.endmacro

.macro Add_16 a_low, a_hi, b_low, b_hi, fast_unsafe
.if .paramcount = 4 .or .paramcount = 2
        CLC
.endif
.if .paramcount >= 4
        __Add_16_1 a_low, a_hi, b_low, b_hi
.else
        __Add_16_2 a_low, a_hi
.endif
CLC
.endmacro